The mystery deepens around an x86 implementation from a corporate entity other than AMD and Intel and has been making some very intriguing changes for coming from a seeming start-up. Beyond 16 tile and 32 tile AMX implementations that already surpass Intel’s current Advanced Matrix Extensions (AMX) capabilities in shipping Xeon CPUs, new disclosures were made today concerning Advanced Performance Extensions (APX), Flexible Return and Event Delivery (FRED), and even x86S as the effort that Intel previously stopped for cleaning up the x86 baggage.
At the end of August was the latest x86 advisory from this unknown company with the public communications being relayed by x86 expert Christian Ludloff. Christian Ludloff has worked for Google, AMD, TI, and others over the years as an x86 architecture expert as well as being known for his sandpile.org x86 CPU information site.
Hitting the Linux kernel mailing list today is the latest message relayed by Ludloff and it’s extremely interesting… FRED, APX, and x86S all seeing usage by the unknown company. Some key takeaways from today’s message:
“I have been asked to document the x86 behavior for a PM64-only PML5-only implementation with FRED and APX that has been used at scale for >1 year.
…
After more than two decades of x86-64, Legacy Mode and Compatibility Mode fulfilled their purpose; it is time to drop the ballast which they pose.Five years ago Intel published the first FRED spec and the dust for it settled in late 2023 and early 2024; Intel just shipped their first products with FRED, and AMD is expected to follow soon. The FRED cleanup for flexible return and event delivery was a crucial milestone in the evolution of x86.
Three years ago Intel published the first APX spec and the first x86S spec. For the APX spec the dust settled in late 2024 and early 2025; Intel and AMD are expected to finally ship their products in the not too distant future. On the other hand, for the x86S spec, Intel gave up in mid 2024. Which turned out to be premature. Someone else continued.”
The mailing list post goes on to note the fundamental x86_64 changes made by the unknown organization. Long story short, it’s a PM64-only PML5-only world for them. The post concludes with:
“Migrate your complexity to x86 software emulation.
Reject x86 cargo cult. And put away the duct tape.”
It remains a mystery who is behind this new x86_64 CPU implementation. It would be a very significant leap in engineering if it were the likes of Zhaoxin or Hygon. One of the possibilities is RosaicLabs as a start-up that reportedly received acces to Atom processor designs from Intel. If they manage to tack on 16 and 32 tile AMX, APX, FRED, x86S, and other engineering feats atop an Atom-based design would be very bold. Will be interesting to see what comes up this x86 mystery.